Phase-change memory 850973 219725813 2008-06-16T16:30:02Z Edward 4261 link [[Hynix]] {{Memory types}} {{otheruses|CRAM}} '''Phase-change memory''' (also known as '''PCM''', '''PRAM''', '''PCRAM''', '''Ovonic Unified Memory''' and '''Chalcogenide RAM C-RAM''') is a type of [[NVRAM|non-volatile computer memory]]. PRAM uses the unique behavior of [[chalcogenide glass]], which can be "switched" between two states, [[crystal|crystalline]] and [[amorphous solid|amorphous]], with the application of heat. Recent versions can achieve two additional distinct states, effectively doubling its storage capacity. PRAM is one of a number of new memory technologies that are attempting to compete in the non-volatile role with the almost universal [[Flash memory]], which has a number of practical problems these replacements hope to address. ==Background== The properties of chalcogenide glasses were first explored as a potential memory technology by [[Stan Ovshinsky|Stanford Ovshinsky]] of Energy Conversion Devices in the 1960s. In the September 1970 issue of [[Electronics (magazine)|''Electronics'']], [[Gordon Moore]]—co-founder of [[Intel]]—published an article on the technology. However, material quality and power consumption issues prevented commercialization of the technology. More recently, interest and research have resumed as flash and [[dynamic random access memory|DRAM]] memory technologies are expected to encounter scaling difficulties as chip [[lithography]] shrinks. The crystalline and amorphous states of chalcogenide glass have dramatically different [[resistivity|electrical resistivity]], and this forms the basis by which data are stored. The amorphous, high resistance state is used to represent a [[Binary numeral system|binary]] 0, and the crystalline, low resistance state represents a 1. Chalcogenide is the same material used in re-writable optical media (such as [[CD-RW]] and [[DVD-RW]]). In those instances, the material's optical properties are manipulated, rather than its electrical resistivity, as chalcogenide's [[refractive index]] also changes with the state of the material. Although PRAM has not yet reached the commercialization stage for consumer electronic devices, nearly all prototype devices make use of a [[chalcogenide]] alloy of [[germanium]], [[antimony]] and [[tellurium]] ([[GeSbTe]]) called GST. It is heated to a high temperature (over 600°C), at which point the chalcogenide becomes a [[liquid]]. Once cooled, it is frozen into an amorphic glass-like state and its [[electrical resistance]] is high. By heating the chalcogenide to a temperature above its [[crystallization|crystallization point]], but below the [[melting point]], it will transform into a crystalline state with a much lower resistance. This phase transition process can be completed in as quickly as five nanoseconds, according to a January 2006 Samsung Electronics patent application concerning the technology. This is comparable to conventional volatile memory devices, for instance, modern [[DRAM]] cells have a switching time on the order of two nanoseconds. A more recent advance pioneered by [[Intel]] and [[ST Microelectronics]] allows the material state to be more carefully controlled, allowing it to be transformed into one of four distinct states; the previous amorphic or crystalline states, along with two new partially crystalline ones. Each of these states has different electrical properties that can be measured during reads, allowing a single cell to represent two bits, doubling memory density.<ref name=review>[http://www.technologyreview.com/Infotech/20148/ A Memory Breakthrough], Kate Greene, Technology Review, 04-Feb-2008</ref> [[Image:PRAM cell structure.svg|thumb|300px|right|A cross-section of two PRAM memory cells. One cell is in low resistance crystalline state, the other in high resistance amorphous state.]] == PRAM vs. Flash == It is the switching time that makes PRAM, and other replacements for flash memory, most interesting. PRAM's temperature sensitivity is perhaps its most notable drawback, one that may require changes in the production process of manufacturers incorporating the technology. Flash memory works by modulating charge ([[electron]]s) stored within the gate of a [[MOSFET|MOS transistor]]. The gate is constructed with a special "stack" designed to trap charges (either on a floating gate or in [[charge trap flash|insulator "traps"]]). The presence of charge within the gate shifts the transistor's [[threshold voltage]], <math>\,V_{th}</math> higher or lower, corresponding to a 1 to 0, for instance. Changing the bit's state requires removing the accumulated charge, which demands a relatively large voltage to "suck" the electrons off the floating gate. This burst of voltage is provided by a [[charge pump]] which takes some time to build up power. General write times for common Flash devices are on the order of one ms (for a block of data), about 100,000 times the typical 10 ns read time, for SRAM for example (for a byte). PRAM can offer much higher performance in applications where writing quickly is important, both because the memory element can be switched more quickly, and also because single bits may be changed to either 1 or 0 without needing to first erase an entire block of cells. PRAM's high speed, thousands of times quicker than conventional hard drives, make it particularly interesting in nonvolatile memory roles that are currently performance-limited by memory access speed. Additionally, with Flash each burst of voltage across the cell causes degradation. As the size of the cells decreases, damage from programming grows worse because the voltage necessary to program the device does not scale with the lithography. Most flash devices are only rated for something on the order of 10,000 to 100,000 writes per sector, and many flash controllers perform [[wear leveling]] to spread writes across many physical sectors. PRAM devices also degrade with use, for different reasons than Flash, but degrade much more slowly. A PRAM device may endure around 100 million write cycles.<ref name=DailyTech>[http://dailytech.com/Article.aspx?newsid=6371 Intel to Sample Phase Change Memory This Year]</ref> PRAM lifetime is limited by mechanisms such as degradation due to GST thermal expansion during programming, metal (and other material) migration, and other mechanisms still unknown. Flash parts can be programmed before being soldered on to a [[Printed circuit board|board]], or even purchased pre-programmed. The contents of a PRAM, however, are lost because of the high temperatures needed to solder the device to a board (see [[Reflow soldering|reflow soldering]] or [[Wave soldering|wave soldering]]). This is made worse by the recent drive to [[Restriction of Hazardous Substances Directive|lead-free]] manufacturing. The manufacturer using PRAM parts must provide a mechanism to program the PRAM "in-system" after it has been soldered in place. The special gates used in Flash memory "leak" charge (electrons) over time, causing corruption and loss of data. The resistivity of the memory element in PCM is more stable, allowing data retention for years or a decade, even at elevated temperatures<ref name=DailyTech /> (which is the worst-case scenario). By carefully modulating the amount of charge stored on the gate, Flash devices can store multiple (usually two) bits in each physical cell. This effectively doubles the memory density, reducing cost. PRAM devices originally stored only a single bit in each cell, but Intel's recent advances have removed this problem. Because Flash devices trap electrons to store information, they are susceptible to data corruption from radiation, making them unsuitable for many space and military applications. PRAM exhibits higher resistance to radiation. PRAM cell selectors can use various devices: [[diode|diodes]], [[Bipolar junction transistor|BJTs]] and [[MOSFET|MOSFETs]]. Using a diode or a BJT provides the greatest amount of current for a given cell size. However, the concern with using a diode stems from parasitic currents to neighboring cells, as well as a higher voltage requirement. The chalcogenide resistance being a necessarily larger resistance than the diode entails that the operating voltage must exceed 1 V by a wide margin to guarantee adequate forward bias current from the diode. Perhaps the most severe consequence of using a diode-selected array, particularly for large arrays, is the total reverse bias leakage current from the unselected bit lines. In transistor-selected arrays, only the selected bit lines contribute reverse bias leakage current. The difference in leakage current is several orders of magnitude. A further concern with scaling below 40 nm is the effect of discrete dopants as the p-n junction width scales down. ==2000 and later== In August of 2004, Nanochip licensed PRAM technology for use in [[MEMS|MEMS]] (micro-electric-mechanical-systems) probe storage devices. These devices are not solid state. Instead, a very small platter coated in chalcogenide is dragged beneath many (thousands or even millions) of electrical probes which can read and write the chalcogenide. Hewlett-Packard's micro-mover technology can accurately position the platter to 3 nanometers so densities of more than 1 [[terabit]] per square inch will be possible if the technology can be perfected. The basic idea is to reduce the amount of wiring needed on-chip; instead of wiring every cell, the cells are placed closer together and read by current passing through the MEMS probes, acting like wires. In September 2006, [[Samsung]] announced a prototype 512&nbsp;Mb (64 MB) device using diode switches<ref name=samsung>[http://www.samsung.com/us/business/semiconductor/newsView.do?news_id=766.0 SAMSUNG Introduces the Next Generation of Nonvolatile Memory - PRAM]</ref>. The announcement was something of a surprise, and it was especially notable for its fairly high density. The prototype features a cell size of only 46.7&nbsp;nm, which is even better than commercial Flash devices currently available. Although Flash devices of even higher ''capacities'' were already available (64Gb, or 8&nbsp;GB, was just coming to market for instance) other Flash competitors are generally much lower density. The only production [[MRAM]] and [[FeRAM]] devices are only 4&nbsp;Mb, for example. The high density of this prototype PRAM device suggests that it could be a real Flash competitor, and not limited to niche roles as these other devices have been. This is especially true in the case of NOR Flash, which allows per-bit addressing (the more common [[NAND]] flash can only be accessed in "banks" of many bytes at a time), which has generally lagged NAND densities and appears to be about the same density as this PRAM device. Samsung's announcement was followed by one from [[Intel]] and [[STMicroelectronics]], who demonstrated their own PCM devices at the 2006 [[Intel Developer Forum]] in October<ref>[http://www.eweek.com/article2/0,1895,2021822,00.asp Intel Previews Potential Replacement for Flash]</ref>. They showed a 128&nbsp;Mb part that had very recently started fabbing at STMicroelectronics's line in Italy. Intel stated that the devices were strictly proof-of-concept, but they expect to start sampling within months, and have widespread commercial production within a few years. Intel is already the leading NOR Flash producer, and appears to be aiming their PCM at the same market as Samsung. PCM is also a promising technology in the military and aerospace industries where radiation effects make the use of standard non-volatile memories such as Flash impractical. PCM memory devices have been introduced by [[BAE Systems]], referred to as C-RAM, claiming excellent radiation tolerance ([[rad-hard]]) and [[latchup]] immunity. Additionally, BAE claims a write cycle endurance of 10<sup>8</sup>, which will allow it to be a contender for replacing [[Programmable read-only memory|PROM]]s and [[EEPROM]]s in space systems. In February 2008, Intel engineers, in cooperation with STMicroelectronics, revealed the first four-state PCM array prototype (effectively 256 Mb on a 128 Mb physical array). This means that instead of the normal two states- fully amorphous and fully crystalline- there are an additional two distinct intermediate states representing different degrees of partial crystallization, allowing for essentially double the memory. Even larger bit densities are possible if tip array technologies such as the HP Micromover are perfected. <ref name=review/> ==Challenges== The greatest challenge for phase-change memory has been the requirement of high programming current density (>10<sup>7</sup> A/cm<sup>2</sup>) in the active volume. This has led to active areas which are much smaller than the driving transistor area. The discrepancy has forced phase-change memory structures to package the heater and sometimes the phase-change material itself in sublithographic dimensions. This is a process cost disadvantage compared to Flash. The contact between the hot phase-change region and the adjacent dielectric is another fundamental concern. The dielectric may begin to leak current at higher temperature, or may lose adhesion when expanding at a different rate from the phase-change material. Phase-change memory is susceptible to a fundamental tradeoff of unintended vs. intended phase-change. This stems primarily from the fact that phase-change is a thermally driven process rather than an electronic process. Thermal conditions which allow for fast crystallization should not be too similar to standby conditions, e.g. room temperature. Otherwise data retention cannot be sustained. With the proper activation energy for crystallization it is possible to have high speed crystallization at programming conditions while having very slow crystallization at normal conditions. ==Timeline== *'''September 1966''': [[Stanford Ovshinsky]] files first patent on phase change technology *'''June 1969''': US Patent 3,448,302 licensed to Ovshinsky claims first reliable operation of phase change memory *'''September 1970''': [[Gordon Moore]] publishes research in [[Electronics Magazine]] *'''June 1999''': Ovonyx joint venture is formed to commercialize PRAM technology *'''November 1999''': Lockheed Martin works with Ovonyx on PRAM for space applications *'''February 2000''': Intel invests in Ovonyx, licenses technology *'''December 2000''': ST Microelectronics licenses PRAM technology from Ovonyx *'''March 2002''': Macronix files a patent application for transistor-less PRAM *'''July 2003''': Samsung begins work on PRAM technology *'''2003 through 2005''': PRAM-related patent applications filed by Toshiba, Hitachi, Macronix, Renesas, Elpida, Sony, Matsushita, Mitsubishi, Infineon and more *'''August 2004''': Nanochip licenses PRAM technology from Ovonyx for use in MEMS probe storage *'''August 2004''': Samsung announces successful 64Mbit PRAM array *'''February 2005''': Elpida licenses PRAM technology from Ovonyx *'''September 2005''': Samsung announces successful 256Mbit PRAM array, touts 400µA programming current *'''October 2005''': Intel increases investment in Ovonyx *'''December 2005'''; Hitachi and Renesas announce 1.5volt PRAM with 100µA programming current *'''December 2005''': Samsung licenses PRAM technology from Ovonyx *'''July 2006''': BAE Systems (formerly Lockheed Martin) begins selling the first commercial PRAM, [http://www.baesystems.com/Newsroom/NewsReleases/2006/autoGen_10703020214.html a Radiation Hardened C-RAM 512Kx8] chip *'''September 2006''': Samsung announces 512Mbit PRAM device *'''October 2006''': Intel and STMicroelectronics show a 128Mbit PRAM chip *'''December 2006''': IBM Research Labs demonstrate a prototype 3 by 20 nanometers<ref>[http://www.techtree.com/India/News/Phase_Change_Memory_to_Replace_Flash/551-77782-581.html Phase Change to Replace Flash?]</ref> *'''January 2007''': [[Qimonda]] licenses PRAM technology from Ovonyx *'''April 2007''': Intel's chief technology officer Justin Rattner is set to give the first public demonstration of the company's PRAM (phase-change RAM) technology <ref>[http://www.techworld.com/storage/news/index.cfm?newsid=8552 Techworld.com - Intel set for first public demo of PRAM<!-- Bot generated title -->]</ref> *'''October 2007''': [[Hynix]] begins pursuing PRAM by [http://www.digitimes.com/news/a20071001PR200.html licensing Ovonyx' technology] *'''February 2008''': Intel and STMicroelectronics announce 4-states PRAM<ref name=review/> ==References== {{reflist}} ==External links== *[http://ovonyx.com/ Ovonyx, Inc.]<BR> *[http://www.ovonic.com Energy Conversion Devices, Inc.]<BR> *[http://www.hitachi.com/New/cnews/051213.html Hitachi/Renesas Low-Power PRAM]<BR> *[http://www.hp.com/hpinfo/abouthp/iplicensing/ars.html Hewlett-Packard Probe Storage]<BR> *[http://www.nanochipinc.com/ Nanochip] *[http://www.samsung.com/PressCenter/PressRelease/PressRelease.asp?seq=20060911_0000286481 Samsung 512Mbit PRAM prototype] *[http://www.eis.na.baesystems.com/news_room/new_product_release/c_ram.htm BAE C-RAM Radiation-Hardened NVM press release] *[http://www.eis.na.baesystems.com/sse/memory_cram.htm BAE C-RAM Radiation-Hardened NVM data sheet] [[Category:Computer memory]] [[Category:Non-volatile memory]] [[de:Phase-change random access memory]] [[es:PRAM]] [[fr:Phase-Change Random Access Memory]] [[ko:PRAM]] [[it:Memoria a cambiamento di fase]] [[nl:PCRAM]] [[ja:PRAM]] [[pl:PRAM]] [[sv:PRAM]]